Engineering, 20.10.2020 20:01 lol23051
Create a Verilog module called ssdec that has three ports: • in: a four-bit input wire • enable: a single input wire • out: a seven-bit output wire The module should implement a hexadecimal decoder for a seven-segment display. It should be similar to the work you did for Lab Experiment 6. This time, however, the decoder will only light LED segments if the enable wire is asserted. The decoder outputs will all be low if the enable wire is low. Instantiate the ssdec module into the standard top module with a statement like this: ssdec ss(.in (pb[3:0]), .enable (pb[19]), .out(ss0[6:0])); The end result should be Verilog code that will display the four-bit value placed on buttons 3..0 on the ss0 display when the 'Z' button is pressed. Submit the Verilog code for both the top and ssdec modules below. Reuse the ssdec module from (1), and build a new top module that instantiates ssdec eight times---one for each of the eight seven-segment displays. Connect each one to its own display. Connect all of their enable wires to pb[19] (the 'Z') button. Connect all of their input wires to pb[3:0]. The end result should be that all eight seven-segment displays show a hexadecimal representation of the binary pattern entered with buttons 3..0. (It is possible to do this with only a single instantiation of ssdec with its outputs connected to all the displays. However, we really want you to make eight separate instances of ssdec this time. Update the design you created in question (2). Modify the enable port for each ssdec instance such that pb[18:16] (which is the set of buttons Y, X and W) indicates which display should turn on. pb[18:16] is a 3-bit binary value, which can be used to represent (-7, so for example if you press pb[18] and pb[16] (or Y and W, which represents the number 5, or 3'b101) the digit should be displayed on ss5. You should be able to change the digit using pb[3:0]. To hold down buttons in the simulator, make sure your editor cursor is not active by clicking anywhere inside the page other than the editor, and pressing the keys 0-9, A-F, or W/X/Y/Z while holding down Shift. This allows you to test multiple digits on multiple displays. Submit the Verilog code for the top and ssdec modules below.
Answers: 3
Engineering, 04.07.2019 18:10, dval1146
You are making beer. the first step is filling the glass carboy with the liquid wort. the internal diameter of the carboy is 15 in., and you wish to fill it up to a depth of 2 ft. if your wort is drawn from the kettle using a siphon process that flows at 3 gpm, how long will it take to fill?
Answers: 1
Engineering, 04.07.2019 18:20, kendrawalraven
The characteristic roots of a dynamic system are: 1.7920 1.8160 i, -1.7920 1.8160 i, -0.4160 what is the order of this system? what are the settling time and damping ratio of the system?
Answers: 3
Create a Verilog module called ssdec that has three ports: • in: a four-bit input wire • enable: a s...
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