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Engineering, 26.06.2020 17:01 russboys3

1. Carry generate (G) and carry propagate (P) are defined as follows: G =AB and P A 1. B. a) Show the expressions for Sum and Carry-out of a 1-bit Full Adder (1bFA) in terms of Carry-In, P and G
b) Design the 1b FA with any number of 2-to-1 multiplexers and logic gates. Show the schematic with inputs A, B, Carry-in and outputs Sum and Carry-out.
c) Estimate the following propagation delays for your schematic:
Carry-in to Carry-out (t1),
Data-to-Carry-out (t2),
Carry-in to sum (t3)
Assume the following propagation delays for 2-to-1mux: data D1, DO to output Y: 5 ns; select S to output Y: 10 ns. Assume a 10 ns delay for logic gates, a 5 ns delay for inverters.
2. Implement the 4-bit Ripple Carry Adder (RCA) for unsinged integers using the 1bFA from problem 2. 1 as building blocks. The adder has 9 inputs A(3:0), B(3:0), CO and 5 outputs S(3:0), C4
a) Show the schematic.
b) Estimate the circuit propagation delays for Carry-in CO to Carry-out C4, Data-to-Carry-out C4

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