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Calculate the Effective CPI of a 2-level cache hierarchy with level-1 direct-mapped cache of 4KB and level-2, 2-way set associative cache of 64KB with the block size of 32 bytes for both caches. The base CPI is assumed to be 1.5 and there are 1.45 memory references per instruction. The hit time to level-1 is 1 clock cycle and hit-time to level-2 is 15 clock cycles. The miss penalty for level-2 is assumed to be 60 clock cycles.

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