Are input and output used to communicate between a human and a processing system?

( true or false question btw )

Chloe is building a kiosk-based excel application. she wants to make some modifications to the screen elements in order to keep users from being distracted by parts of the application that are irrelevant to her application. she turns to henry for guidance as she knows he built a similar solution earlier this year. chloe has decided to hide the worksheet gridlines and the vertical scroll bar. what does henry tell her to use to do this? a) screen elements dialog boxb) display options dialog boxc) customization dialog boxd) excel options dialog box

You need to design a circuit that implements the functions in the following table: s0 s1 function0 0 a + 10 1 a – b1 0 a + b1 1 a – 1s0 and s1 are 1-bit control inputs to select the function of the circuit. inputs a and b are 4-bitnumbers in 2s complement form. the output is also a 4-bit number in 2s complement form. you are allowed to use only one ttl 7483 4-bit adder to implement all the functions. but anynumber of other components (except the adder) can be used. hint: design a combinational logic circuit to modify the input b and the “carry input” of theadder depending on the control inputs s0 and s1.important: lab grade will depend on the working of the circuit & will be checked of by your labinstructor.1. is the output valid for the following input combinations: a. s0 = 0, s1 = 0, a = 7, b = 3? b. s0 = 0, s1 = 1, a = 7, b = 3? c. s0 = 1, s1 = 0, a = -4, b = -5? d. s0 = 1, s1 = 1, a = -8, b = 6? 2. what is the range of inputs (for both a and b) that will produce the valid output for all the functions?

Acomputer has a two-level cache. suppose that 60% of the memory references hit on the first level cache, 35% hit on the second level, and 5% miss. the access times are 5 nsec, 15 nsec, and 60 nsec, respectively, where the times for the level 2 cache and memory start counting at the moment it is known that they are needed (e. g., a level 2 cache access does not even start until the level 1 cache miss occurs). what is the average access time?