5.2 Caches are important to providing a high-performance memory hierarchy to processors. Below is a list of 32-bit memory address references, given as word addresses. 3, 180, 43, 2, 191, 88, 190, 14, 181, 44, 186, 253

5.2.3 You are asked to optimize a cache design for the given references. There are three direct-mapped cache designs possible, all with a total of 8 words of data: C1 has 1-word blocks, C2 has 2-word blocks, and C3 has 4-word blocks. In terms of miss rate, which cache design is the best? If the miss stall time is 25 cycles, and C1 has an access time of 2 cycles, C2 takes 3 cycles, and C3 takes 5 cycles, which is the best cache design?

Write a program in plp assembly that counts up by one starting from zero (or one) inside a loop and writes this value to the leds every time the value is increased. the memory address of the leds is 0xf0200000. the table below shows the meaning and an example usage of the instructions covered in the video, plp instructions for project 1. instruction example usage meaning load immediate li $t0, 8 register $t0 is set to the value, 8. store word sw $t2, 0($t1) the value in register $t1 is used as the memory address. the value in register $t2 is copied into this memory address. add addiu $t4, $t3, 29 register $t4 is assigned the sum of 29 and the value in register $t3. jump j your_label_name the program jumps to the line following the label, "your_label_name: ". label your label name: defines a label called "your_label_name: " that can be jumped to