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You need to design a circuit that implements the functions in the following table: s0 s1 function0 0 a + 10 1 a – b1 0 a + b1 1 a – 1s0 and s1 are 1-bit control inputs to select the function of the circuit. inputs a and b are 4-bitnumbers in 2s complement form. the output is also a 4-bit number in 2s complement form. you are allowed to use only one ttl 7483 4-bit adder to implement all the functions. but anynumber of other components (except the adder) can be used. hint: design a combinational logic circuit to modify the input b and the “carry input” of theadder depending on the control inputs s0 and s1.important: lab grade will depend on the working of the circuit & will be checked of by your labinstructor.1. is the output valid for the following input combinations: a. s0 = 0, s1 = 0, a = 7, b = 3? b. s0 = 0, s1 = 1, a = 7, b = 3? c. s0 = 1, s1 = 0, a = -4, b = -5? d. s0 = 1, s1 = 1, a = -8, b = 6? 2. what is the range of inputs (for both a and b) that will produce the valid output for all the functions?

Suppose there is a relation r(a, b, c) with a b+-tree index with search keys (a, b).1. what is the worst-case cost of finding records satisfying 10 < a < 50 using this index, in terms of the number of records n1, retrieved and the height h of the tree? 2. what is the worst-case cost of finding records satisfying 10 < a < 50 and 5 < b < 10 using this index, in terms of the number of records n2 that satisfy this selection, as well as n1 and h defined above? 3. under what conditions on n1 and n2, would the index be an efficient way of finding records satisfying the condition from part (2)?

George is working as a programming team lead. which statements correctly describe the skills that he requires?