Computers and Technology, 12.08.2020 04:01 dee5896

Suppose you had an 8-bit computer system with a 256 Byte main memory and a 32 byte 2-way Set Associative cache with a line size of 2 Bytes which uses LRU to manage the contents of the sets. Assuming that the cache starts out completely empty, which of the following memory accesses would be hits and misses? (each address is given in binary)1001001001101101011011101010 00110110111111011100100100110101110 0110111010110110111011100

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Suppose you had an 8-bit computer system with a 256 Byte main memory and a 32 byte 2-way Set Associa...