Computers and Technology, 26.12.2019 01:31 michaelmcgee99
Assume that we have an application with a total of 500,000 instructions where 20% of them are the load/store instructions with an average cpi of 6 cycles, and the rest instructions are alu instructions with average cpi of 1 cycle. if we double the clock rate without optimizing the memory latency, the average cpi for load/store instruction will also be doubled to 12 cycles. what is the speedup after this change?
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/x) / (3.2*5*
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