In this exercise we examine how an instruction is executed in a single-cycle datapath. questions in this exercise refer to a clock cycle in which the processor fetches the following 32-bit mips instruction word: 10101111101101 assume the initial pc (before the instruction) is 0x1a65f7d9 a. what is the mips assembly code for this machine instruction? b. what is the output of the sign-extend element for this instruction word? c. what is the new pc address after this instruction is executed? d. for each mux, give the values of the data that is output during the execution of this instruction. give answers as numbers in base indicated or as 'x' for ignored, or "don't care" wrreg mux (base ten) alu mux (base ten) mem/alu mux (base ten) branch mux (base hex) wrreg mux alu mux mem/alu mux branch mux ss read read register write register data data 2 os 15-11 write isters data nemory fyi: multiplexors from the mips datapath