Suppose we have a deeply pipelined processor, for which we implement a branch-target buffer for the conditional branches only. assume that the misprediction penalty is always four cycles and the buffer miss penalty is always three cycles. assume a 90% hit rate, 80% accuracy, and 10% branch frequency. how much faster is the processor with the branchtarget buffer versus a processor that has a fixed two-cycle branch penalty? assume a base clock cycle per instruction (cpi) without branch stalls of 1.

Write a pseudocode solution for each of these problems. 1. design a while loop that lets that user enter a number. the number should be multiplied by 10, and the result stored in a variable named product. the loop should iterate as long as product contains a value less than 100. 2. design a do-while loop that asks the user to enter two numbers. the numbers should be added and the sum displayed. the loop should ask the user whether he or she wishes to perform the operation again. if so, the loop should repeat; otherwise it should terminate. 3. design a for loop that displays the following set of numbers: 0, 10, 20, 30, 40, 50 100. 4. design a nested loop that displays 10 rows of # characters. there should be 15 # characters in each row. 5. convert this for loop to a while loop. declare integer count for count = 1 to 50 display count end for 6. find the error in the following pseudocode. declare boolean finished = false declare integer value, cube while not finished display “enter a value to be cubed.” input value; set cube = value ^ 3 display value, “ cubed is “, cube end while

Digital information is stored using a series of ones and zeros. computers are digital machines because they can only read information as on or off –1 or 0. this method of computation is known as the system

To maintain clarity and focus lighting might be needed